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1 ? fn7358.5 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2002-2004, 2006. all rights reserved. all other trademarks mentioned are the property of their respective owners. el5108, el5308 450mhz fixed gain amplifiers with enable the el5108 and el5308 are fixed gain amplifiers with a bandwidth of 450mhz. this make s these amplifiers ideal for today?s high speed video and monitor applications. they feature internal gain-setting resistors and can be configured in a gain of +1, -1 or +2. the same bandwidth is seen in both gain-of-1 and gain-of-2 applications. the el5108 and el5308 also incorporate an enable and disable function to reduce the supply current to 25a typical per amplifier. allowing the ce pin to float or applying a low logic level will enable the amplifier. the el5108 is offered in the 6 ld sot-23 and the industry- standard 8 ld so packages and the el5308 is available in the 16 ld so and 16 ld qsop packages. all operate over the industrial temperature range of -40c to +85c. features ? pb-free plus anneal available (rohs compliant) ? gain selectable (+1, -1, +2) ? 450mhz -3db bw (a v = -1, +1, +2) ? 3.5ma supply current per amplifier ? single and dual supply operation, from 5v to 12v ? available in sot-23 packages ? 350mhz, 1.5ma product available (el5106 & el5306) applications ? battery powered equipment ? handheld, portable devices ? video amplifiers ? cable drivers ? rgb amplifiers ordering information part number part marking package tape & reel pkg. dwg. # el5108iw-t7 r 6 ld sot-23 7? (3k pcs) mdp0038 el5108iw-t7a r 6 ld sot-23 7? (250 pcs) mdp0038 el5108is 5108is 8 ld so - mdp0027 el5108is-t7 5108is 8 ld so 7? mdp0027 el5108is-t13 5108is 8 ld so 13? mdp0027 el5108isz (see note) 5108isz 8 ld so - mdp0027 el5108isz-t7 (see note) 5108isz 8 ld so 7? mdp0027 EL5108ISZ-T13 (see note) 5108isz 8 ld so 13? mdp0027 el5308is el5308is 16 ld so (0.150?) - mdp0027 el5308is-t7 el5308is 16 ld so (0.150?) 7? mdp0027 el5308is-t13 el5308is 16 ld so (0.150?) 13? mdp0027 el5308iu 5308iu 16 ld qsop - mdp0040 el5308iu-t7 5308iu 16 ld qsop 7? mdp0040 el5308iu-t13 5308iu 16 ld qsop 13? mdp0040 el5308iuz (see note) 5308iuz 16 ld qsop (pb-free) - mdp0040 el5308iuz-t7 (see note) 5308iuz 16 ld qsop (pb-free) 7? mdp0040 el5308iuz-t13 (see note) 5308iuz 16 ld qsop (pb-free) 13? mdp0040 note: intersil pb-free plus anneal products employ special pb-free material sets; mo lding compounds/die attach materials and 100 % matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free p roducts are msl classified at pb-free peak reflow temper atures that meet or exceed the pb-free requirements of ipc/jedec j std-020. data sheet june 15, 2006
2 fn7358.5 june 15, 2006 pinout el5108 (8 ld so) top view el5108 (6 ld sot-23) top view el5308 (16 ld so, qsop) top view - + nc in- in+ vs- ce vs+ out nc 1 2 3 4 8 7 6 5 - + out vs- in+ vs+ in- ce 1 2 3 6 4 5 1 2 3 4 16 15 14 13 5 6 7 12 11 10 8 9 - + - + - + ina+ cea vs- ceb inb+ nc cec inc+ ina- outa vs+ outb inb- nc outc inc- el5108, el5308
3 fn7358.5 june 15, 2006 absolute maxi mum ratings (t a = 25c) supply voltage between v s + and v s - . . . . . . . . . . . . . . . . . . . 13.2v maximum continuous output current . . . . . . . . . . . . . . . . . . . 50ma maximum slewrate from v s + to v s - . . . . . . . . . . . . . . . . . . . . 1v/s operating junction temperature . . . . . . . . . . . . . . . . . . . . . . . 125c power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves pin voltages. . . . . . . . . . . . . . . . . . . . . . . . . v s - -0.5v to v s + +0.5v storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c ambient operating temperature . . . . . . . . . . . . . . . .-40c to +85c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v s + = +5v, v s - = -5v, r l = 150 ? , t a = 25c unless otherwise specified. parameter description conditions min typ max unit ac performance bw -3db bandwidth a v = +1 440 mhz a v = -1 445 mhz a v = +2 450 mhz bw1 0.1db bandwidth a v = +2 40 mhz sr slew rate v o = -2.5v to +2.5v, a v = +2 3500 4500 v/s t s 0.1% settling time v out = -2.5v to +2.5v, a v = +2 10 ns e n input voltage noise 2nv/ hz i n input current noise f = 2khz 12 pa/ hz dg differential gain error (note 1) a v = +2 0.01 % dp differential phase error (note 1) a v = +2 0.01 dc performance v os offset voltage -8 +3 +8 mv t c v os input offset voltage temperature coefficient measured from t min to t max 5v/c a e gain error v o = -3v to +3v, r l = 150 ? 0.7 2.5 % r f , r g internal r f and r g 325 ? input characteristics cmir common mode input range 3 3.3 v +i in + input current 28a r in input resistance at i n +0.7m ? c in input capacitance 1pf output characteristics v o output voltage swing r l = 150 ? to gnd 3.6 3.8 v r l = 1k ? to gnd 3.8 4.0 v i out output current r l = 10 ? to gnd 100 135 ma supply i son supply current - enabled (per amplifier) no load, v in = 0v 3.18 3.7 4.35 ma i soff supply current - disabled (per amplifier) no load, v in = 0v 9 25 a psrr power supply rejection ratio dc, v s = 4.75v to 5.25v 75 db el5108, el5308
4 fn7358.5 june 15, 2006 enable t en enable time 280 ns t dis disable time (note 2) 560 ns i ihce ce pin input high current ce = v s +-1525a i ilce ce pin input low current ce = v s -+1-1a v ihce ce input high voltage for power-down v s + -1 v v ilce ce input low voltage for enable v s + -3 v notes: 1. standard ntsc test, ac signal amplitude = 286mv p-p , f = 3.58mhz 2. measured from the application of the ce logic signal until the output voltage is at the 50% point between initial and final values electrical specifications v s + = +5v, v s - = -5v, r l = 150 ? , t a = 25c unless otherwise specified. (continued) parameter description conditions min typ max unit pin descriptions el5108 (so8) el5108 (sot23-6) el5308 (so16, qsop16) pin name function equivalent circuit 1, 5 6, 11 nc not connected 2 4 9, 12, 16 in- inverting input circuit 1 3 3 1, 5, 8 in+ non-inverting input (reference circuit 1) 4 2 3 vs- negative supply 6 1 10, 13, 15 out output circuit 2 7 6 14 vs+ positive supply 852, 4, 7ce chip enable circuit 3 r g r f in- in+ r f out v s + v s - ce el5108, el5308
5 fn7358.5 june 15, 2006 typical performance curves figure 1. frequency respon se figure 2. phase response figure 3. frequency response vs output voltage figure 4. frequency response vs r l figure 5. frequency response for various c l figure 6. group delay vs frequency 100k frequency (hz) 1m 10m 1g normalized gain (db) 1 -1 -3 -5 3 5 100m a v = -1 a v = 2 a v = 1 v s =5v v in =200mv p-p r l =150 ? 1 100k frequency (hz) 1m 10m 1g phase () -45 -135 -225 -315 45 135 100m a v = -1 a v = 1 a v = 2 v s =5v v in =200v p-p r l =150 ? 100k frequency (hz) 1m 10m 1g gain (db) 7 5 3 1 9 11 100m v op-p = 400mv v op-p = 2v v s =5v a v =2 r l =150 ? 100k frequency (hz) 1m 10m 1g gain (db) 7 5 3 1 9 11 100m r l = 500 ? r l = 150 ? r l = 100 ? r l = 50 ? v s =5v a v =2 100k frequency (hz) 1m 10m 1g gain (db) 7 5 3 1 9 11 100m c l = 6.8pf c l = 0pf c l = 4.7pf c l = 2.2pf v s =5v a v =2 r l =150 ? 100k frequency (hz) 1m 10m 1g delay (ns) 0.6 0.4 0.2 0 0.8 1 1.2 100m a v = -1 a v = 1 a v = 2 v s =5v r l =150 ? el5108, el5308
6 fn7358.5 june 15, 2006 figure 7. input to output isolation vs frequency (for disable mode) figure 8. output impedence vs frequency figure 9. voltage and current noise vs freque ncy figure 10. power supply rejection ratio vs frequency figure 11. bandwidth vs supply voltage figure 12. peaking vs supply voltage typical performance curves (continued) 100k frequency (hz) 1m 10m 1g gain (db) -25 -45 -65 -85 -5 15 100m a v =2 r l =150 ? 10k frequency (hz) 100k 1m 100m impedence ( ? ) 0.1 0.01 0.002 1 10 100 10m 100 frequency (hz) 1k 10m 1 10 1k 10k 100k 1m 100 i n v n v n (nv/ hz), i n (pa/ hz) 1k frequency (hz) 10k 100m psrr (db) -80 -60 -40 -20 0 100k 1m 10m -10 -30 -50 -70 v s =5v a v =2 4.5 v s (v) 55.5 11 bandwidth (mhz) 340 320 300 380 440 480 6 77.588.599.51010.5 6.5 460 420 360 a v = -1 a v = 1 a v = 2 400 r l = 150 ? 4.5 v s (v) 55.5 11 peaking (db) 0.6 0.4 0.2 0.8 1 1.2 1.4 6 7 7.5 8 8.5 9 9.5 10 10.5 6.5 a v = -1 a v = 2 a v = 1 r l = 150 ? el5108, el5308
7 fn7358.5 june 15, 2006 figure 13. distortion vs frequency figure 14. supply current vs supply voltage figure 15. large signal response f igure 16. small signal response figure 17. disabled respons e figure 18. enabled response typical performance curves (continued) 0 frequency (mhz) 10 60 distortion (db) -80 -90 -70 -60 -50 -40 30 40 50 20 hd2 hd3 v s =5v a v =2 r l =150 ? v o =2v p-p 4.5 v s (v) 55.5 11 i s (ma) 2.9 2.7 2.5 3.3 3.5 3.7 3.9 6 7 7.5 8 8.5 9 9.5 10 10.5 6.5 i s +, i s - 3.1 10ns/div 1v/div v o =2v 10ns/div 100mv/div v o =200mv ch1 2.00v/div ch2 1.00v/div m=100ns ch1 2.00v/div ch2 1.00v/div m=100ns el5108, el5308
8 fn7358.5 june 15, 2006 applications information product description the el5108 and el5308 are fixed gain amplifiers that offer a wide -3db bandwidth of 450mhz and a low supply current of 3.5ma per amplifier. they work with supply voltages ranging from a single 5v to 10 v and they are also capable of swinging to within 1.2v of either supply on the output. these combinations of high bandwidth, low power, and high slew rate make the el5108 and el5308 the ideal choice for many low-power/high-bandwidth appl ications such as portable, handheld, or battery-powered equipment. for varying bandwidth and higher gains, consider the el5166 with 1ghz on a 9ma su pply current or the el5164 with 600mhz on a 3.5ma supply current. versions include single, dual, and triple amp packages with 6 ld sot-23, 16 ld qsop, and 8 ld or 16 ld so outlines. power supply bypassing and printed circuit board layout as with any high frequency device, good printed circuit board layout is necessary for optimum performance. low impedance ground plane construction is essential. surface mount components are recommended, but if leaded components are used, lead lengths should be as short as possible. the power supply pins must be well bypassed to reduce the risk of oscillation. the combination of a 4.7f tantalum capacitor in parall el with a 0.01f capacitor has been shown to work well when placed at each supply pin. disable/power-down the el5108 and el5308 amplifiers can be disabled and placing their outputs in a high impedance state. when disabled, the amplifier supply current is reduced to <25a. the el5108 and el5308 are disabled when the ce pin is pulled up to within 1v of the positive supply. similarly, the amplifier is enabled by floating or pulling its ce pin to at least 3v below the positive supply. for 5v supply, this means that the amplifier will be enabled when ce is 2v or less, and disabled when ce is above 4v. although the logic levels are not standard ttl, this choice of logic voltages allow the el5108 and el5308 to be enabled by tying ce to ground, even in 5v single supply applications. the ce pins can be driven from cmos outputs. gain setting the el5108 and el5308 are built with internal feedback and gain resistors. the internal feedback resistors have equal value; as a result, the amplifier can be configured into gain of +1, -1, and +2 without any external resistors. figure 21 shows the amplifier in gain of +2 configuration. the gain error is 2% maximum. figure 22 shows the amplifier in gain of -1 configuration. for gain of +1, in+ and in- should be connected together as shown in figure 23. this configuration avoids the effect s of any parasitic capacitance on the in- pin. since the internal feedback and gain resistors change with temperature and pr ocess, external resistor should not be used to adjust the gain settings. figure 19. package power dissipation vs ambient temperature figure 20. package power dissipation vs ambient temperature typical performance curves (continued) 1 0.9 0.8 0.6 0.4 0.1 0 0 25 50 75 100 150 ambient temperature (c) power dissipation (w) 125 85 jedec jesd51-3 low effective thermal conductivity test board 0.2 0.7 0.3 0.5 909mw 625mw 633mw 391mw so16 (0.150?) ja =110c/w so8 ja =160c/w qsop16 ja =158c/w sot23-6 ja =256c/w ambient temperature (c) 0 0.4 1.4 1.2 1 0.8 0.6 0.2 0 25 50 75 100 150 power dissipation (w) 125 85 jedec jesd51-7 high effective thermal conductivity test board 0.1 1.250w qsop16 ja =112c/w 909mw 893mw 435mw so8 ja =110c/w sot23-6 ja =230c/w so16 (0.150?) ja =80c/w figure 21. a v = +2 - + 325 ? 325 ? in- in+ el5108, el5308
9 fn7358.5 june 15, 2006 supply voltage range and single-supply operation the el5108 and el5308 have been designed to operate with supply voltages having a span of greater than or equal to 5v and less than 12v. in practical terms, this means that they will operate on dual supplies ranging from 2.5v to 5v. with single-supply, they will operate from 5v to 10v. as supply voltages continue to decrease, it becomes necessary to provide input and output voltage ranges that can get as close as possible to the supply voltages. the el5108 and el5308 have an input range which extends to within 2v of either supply. so, for example, on 5v supplies, the input range is about 3v. the output range is also quite large, extending to within 1v of the supply rail. on a 5v supply, the output is therefore capable of swinging from -4v to +4v. single-supply output range is larger because of the increased negative swing due to the external pull-down resistor to ground. figure 24 shows an ac-coupled, gain of +2, +5v single supply circuit configuration. video performance for good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as dc levels are changed at the output. this is especially difficult when driving a standard video load of 150 ? , because of the change in output current with dc level. previously, good diff erential gain could only be achieved by running high idle currents through the output transistors (to reduce variat ions in output impedance). special circuitry has been incorporated in the el5108 and el5308 to reduce the variatio n of output impedance with current output. this results in dg and dp specifications of 0.01% and 0.01, while driving 150 ? at a gain of 2. output drive capability in spite of its low 3.5ma of su pply current per amplifier, the el5108 and el5308 are capable of providing a maximum of 130ma of output current. driving cables and capacitive loads when used as a cable driver, double termination is always recommended for reflection-free performance. for those applications, the back-termination series resistor will decouple the el5108 and el5308 from the cable and allow extensive capacitive drive. however, other applications may have high capacitive loads without a back-termination resistor. in these applications, a small series resistor (usually between 5 ? and 50 ? ) can be placed in series with the output to eliminate most peaking. current limiting the el5108 and el5308 have no internal current-limiting circuitry. if the output is short ed, it is possible to exceed the absolute maximum rating for output current or power dissipation, potentially result ing in the destruction of the device. power dissipation with the high output drive ca pability of the el5108 and el5308, it is possible to exceed the 125c absolute maximum junction temperature under certain very high load current conditions. generally speaking when r l falls below about 25 ? , it is important to calculate the maximum junction temperature (t jmax ) for the application to determine if power supply voltages, load conditions, or package type need to be modified for the el5108 and el5308 to remain in the safe operating area. these parameters are calculated as follows: figure 22. a v = -1 - + 325 ? 325 ? in- gnd figure 23. a v = +1 - + 325 ? 325 ? in- in+ figure 24. - + 325 ? 325 ? v in +5 0.1f 1k 1k 0.1f +5 v out 4.7f t jmax t max ja npd max () + = el5108, el5308
10 fn7358.5 june 15, 2006 where: t max = maximum ambi ent temperature ja = thermal resistance of the package n = number of amplifiers in the package pd max = maximum power dissipation of each amplifier in the package pd max for each amplifier can be calculated as follows: where: v s = supply voltage i smax = maximum supply current of 1a v outmax = maximum output voltage (required) r l = load resistance pd max 2 ( v s i smax ) v s ( - v outmax ) v outmax r l ---------------------------- + = el5108, el5308
11 fn7358.5 june 15, 2006 el5108, el5308 small outline package family (so) gauge plane a2 a1 l l1 detail x 4 4 seating plane e h b c 0.010 b m ca 0.004 c 0.010 b m ca b d (n/2) 1 e1 e n n (n/2)+1 a pin #1 i.d. mark h x 45 a see detail ?x? c 0.010 mdp0027 small outline package family (so) symbol so-8 so-14 so16 (0.150?) so16 (0.300?) (sol-16) so20 (sol-20) so24 (sol-24) so28 (sol-28) tolerance notes a 0.068 0.068 0.068 0.104 0.104 0.104 0.104 max - a1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.003 - a2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 0.001 - d 0.193 0.341 0.390 0.406 0.504 0.606 0.704 0.004 1, 3 e 0.236 0.236 0.236 0.406 0.406 0.406 0.406 0.008 - e1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 basic - l 0.025 0.025 0.025 0.030 0.030 0.030 0.030 0.009 - l1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 reference - n 8 14 16 16 20 24 28 reference - rev. l 2/01 notes: 1. plastic or metal protrusions of 0.006? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m - 1994
12 fn7358.5 june 15, 2006 el5108, el5308 sot-23 package family e1 n a d e 4 3 2 1 e1 0.15 d c 2x 0.20 c 2x e b 0.20 m d c a-b b nx 6 2 3 5 seating plane 0.10 c nx 1 3 c d 0.15 a-b c 2x a2 a1 h c (l1) l 0.25 0 +3 -0 gauge plane a mdp0038 sot-23 package family symbol sot23-5 sot23-6 tolerance a 1.45 1.45 max a1 0.10 0.10 0.05 a2 1.14 1.14 0.15 b 0.40 0.40 0.05 c 0.14 0.14 0.06 d 2.90 2.90 basic e 2.80 2.80 basic e1 1.60 1.60 basic e 0.95 0.95 basic e1 1.90 1.90 basic l 0.45 0.45 0.10 l1 0.60 0.60 reference n 5 6 reference rev. e 3/00 notes: 1. plastic or metal protrusions of 0.25mm maximum per side are not included. 2. plastic interlead protrusions of 0.25mm maximum per side are not included. 3. this dimension is measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994. 5. index area - pin #1 i.d. will be located within the indicated zone (sot23-6 only). 6. sot23-5 version has no center lead (shown as a dashed line).
13 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7358.5 june 15, 2006 el5108, el5308 quarter size outline plast ic packages family (qsop) 0.010 c a b seating plane detail x e e1 1 (n/2) (n/2)+1 n pin #1 i.d. mark b 0.004 c c a see detail "x" a2 44 gauge plane 0.010 l a1 d b h c e a 0.007 c a b l1 mdp0040 quarter size outline plastic packages family symbol qsop16 qsop24 qsop28 tolerance notes a 0.068 0.068 0.068 max. - a1 0.006 0.006 0.006 0.002 - a2 0.056 0.056 0.056 0.004 - b 0.010 0.010 0.010 0.002 - c 0.008 0.008 0.008 0.001 - d 0.193 0.341 0.390 0.004 1, 3 e 0.236 0.236 0.236 0.008 - e1 0.154 0.154 0.154 0.004 2, 3 e 0.025 0.025 0.025 basic - l 0.025 0.025 0.025 0.009 - l1 0.041 0.041 0.041 basic - n 16 24 28 reference - rev. e 3/01 notes: 1. plastic or metal protrusions of 0.006? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994.

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